Semiconductor company Lattice has put some of its low-cost field programmable gate arrays through the automotive qualification process and is targeting them at advanced driver assistance features. The company has been working with automotive suppliers and believes the chips will make the features available for a wider range of vehicles.
Lattice targets FPGA range at driver assistance features
A semiconductor company hopes that its programmable logic will help make advanced driver assistance features more affordable.
Gordon Hands from Lattice Semiconductor
Photo by Steve Rogerson
Lattice Semiconductor is hoping to use its experience in producing FPGAs (field programmable gate arrays) for mass markets to help car makers bring driver assistance features down from high-end cars to a broader range of vehicles.
“Electronic systems are becoming the differentiating features in the cars,” said Gordon Hands, Lattice’s director of product marketing. “I am talking about things such as rear-view cameras, side mirror replacement technology and 360˚ view technology.”
For many of these types of applications, car makers have tended to use asics (application specific integrated circuits) or ASSPs (application specific standard products).
“Some even use a standard chip, but how can you differentiate from your competitors?” said Hands.
As such, the company has AEC-Q100 qualified six low-cost FPGAs to target this market. The LA-Lattice ECP3 units include up six banks of configurable IO and four 3Gbit/s serdes to link automotive-based networks, components and technologies.
The sensor input has been designed to work with sensors from different companies.
“And if people want different interfaces, we can work hard to get them to work,” said Hands. “We have a programmable IO buffer. We change the way you set up the input buffer and then the output circuitry to fit. As new standards emerge, we will look at how we can pre-configure and enable that support for the customer.”
He said if customers wanted “unique requirements” then Lattice was prepared to have its engineers sit down with their engineers to work together at solving the problems.
The devices include digital-signal processing, high-density on-chip memory, programmable DDR3 memory interfaces, and 17k or 35k look-up tables. Package sizes range down to 10 by 10mm. They are built using 65nm technology.
“We are working on a 40nm version,” said Hands, “and details will be available in the fourth quarter. This will be available as a standard and automotive FPGA.”
Samples for the six 65nm devices have been with some customers since February and Lattice has been working with some of them for a year. These are tier ones and module suppliers.
BGA packages range from 256 to 484 balls and they are qualified for immediate production. The 10 by 10mm 328-ball version will cost about US$6 each in 50,000 quantities.
The company’s HDR-60 development kit lets designers quickly prototype camera systems using a choice of image sensors, and various combinations of camera technologies. The kit also makes it easy to optimise image-processing code, use Ethernet or HDMI interfaces to display images, drive lenses, or add daughter boards.
|Programming FPGAs: Getting Started with Verilog (Electronics)|
Take your creations to the next level with FPGAs and VerilogThis fun guide shows how to get started with FPGA technology using the popular Mojo, Papilio One, and Elbert 2 boards...
|RioRand® EP2C5T144 Altera Cyclone II FPGA Mini Development Board|
Using the CycloneIIEP2C5T144 chip of ALTERA Company as the core minimum system, the FPGA easily embedded into the actual system. Complete the simple logic control, data acquisit...
|Programmable Logic IC Development Tools DE0-NANO (4CE22F) CYCLONE FPGA DEV KIT|
Core Architecture: FPGA. Core Architecture: FPGA. Core Sub-Architecture: Cyclone. Core Sub-Architecture: Cyclone. Features: EP4CE22F17C6N FPGA, 2x GPIO Headers, 32MB RAM, Accele...